ARM Cortex-M4

ARM Generic User Guide 

- http://infocenter.arm.com/help/topic/com.arm.doc.dui0553a/DUI0553A_cortex_m4_dgug.pdf

 

 

 

Key features

 

- Armv7E-M architecture

- 3-stage pipeline with branch speculation.

- Instruction sets:

Thumb-1 (entire).

Thumb-2 (entire).

32-bit hardware integer multiply with 32-bit or 64-bit result, signed or unsigned, add or subtract after the multiply.

32-bit hardware integer divide (2-12 cycles).

Saturation arithmetic support.

DSP extension: Single cycle 16/32-bit MAC, single cycle dual 16-bit MAC, 8/16-bit SIMD arithmetic.

- 1 to 240 interrupts, plus NMI.

- 12 cycle interrupt latency.

- Integrated sleep modes.

 

 

 

Memory

 

 

 

 

 

Register