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관리 메뉴

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jae_walker 2018. 4. 12. 16:45

Binary와 logic gate


- 2진보수와 binary codes : 1's & 2's, BCD, Gray, ASCII 등

- 부울대수와 Truth table

- minterm(최소항)/standard product(표준곱) <=> maxterm(최대항)/standard sum(표준합)

- 2진함수의 standard form : 곱의합(sum of product) & 합의곱(product of sum)

- 논리 gate

- gate-level 최소화 : K-map(카르노맵)




조합논리(combinational logic)와 순차논리(sequential logic)


- (Binary) Half adder(반가산기)와 Full adder(전가산기), BCD adder

- Multiplier / comparator

- decoder / encoder ./ MUX(multiplexer)


- Latch / FF(Flip-flop)

- SR-latch, D-latch

- Edge-trigger, D-FF, JK-FF, T-FF

- Mealy / Moore machine




Register / Counter


- shift reg

- ripple / ring / johnson counter

- 동기식 / 비동기식




Memory


- RAM (R/W, 타이밍, decoding, address MUXing)

- SRAM / DRAM

- 오류 검출 및 수정 (parity, hamming code)

- ROM (PROM, EPROM, EEPROM, Flash memory)




PLD(Programmable Logic Device)


- 조합 PLD(Programmable Logic Device) : PROM / PAL(Programmable Array Logic) / PLA(Programmable Logic Array) / FPLA(Field PLA)

- SPLD(Sequential PLD) / CPLD(Complex) / FPGA(Field-programmable Gate Array)

- HDL / VHDL / Verilog

- Register transfer level






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